This project came from two projects I was looking to persue, one being to make my own 68K single board computer. Another, well I needed a new namebadge of-course! So I decided as a challenge lets try and do both within a formfactor not too crazy. I found an old protoboard that was cut off from something else and decided on that as the formfactor. Arbitrary at best, but it would prove to be a bit of a challenge to get everything crammed in there. There were a few goals for this.
One, original 68K, yes a massive 0.1” 64-pin dip package. I had this chip kicking around forever NOS waiting for this project.
Two, I’d like to get it running *nix at some point, following in the footsteps of many like Steve Chamberlin and his 68-katy.
Three, it’ll need to use original 7400 series logic for decoding/etc, no pals/gals/fpgas to cheat here!
Four, RAM will be newer sram to save space/power/etc. Not much in the way of getting around this one with these size/power/etc constraints.
Five, UART will be a parrelel ftdi chip, to make it easy, but the UART will be removable for “badge” mode, and can plug into the side for sitting on a table and hooking into a console.
Six, Storage, IDE! I will have 64kW of EEPROM on board for a prom monitor, but I NEED more storage for running some *nix confortably. From previous experiences in making an IDE interface and code for a Glitchwrks 8085 singleboard computer, IDE was a clear choice of being fairly simple to interface to and talk to. Now of-course I won’t just hang an IDE hard drive off the side of this thing, I will be using a small IDE DOM thats <1GB in size and can be powered with 5V over the IDE connector.
That’s a tall order! Oh and incase you missed it, I said I’d do this on perfboard… IE point to point! Its something I’ve always wanted to do, I’ve made PCBs up to this point and actually ended up making a special ram board for this project itself. But I wanted this to be special and one off. So point to point! I did actually draw up schematics in KiCAD for this project though in-case I ever wanted to make a board for it. But it was mostly so I could follow along while wiring it.
So I begun, deciding on an initial layout I placed sockets and such based on an initial schematic.
Luckily this proto-board I have has internal power planes, which makes power distribution and de-coupling much easier.
It became apparent fairly quickly that this would be a tight fit. But with the ambition to go forward with this project I started laying down wire.
After a few afternoons of soldering for quite a few hours it was slowly getting there. This was definitely a lot more wiring than I’d think it be! It was coming along though.
At this point I had added the IDE port and the UART port which you can see on the right and left respectively.
You will also notice a long pin header split into two sections at the bottom just above the 68K’s socket. This is for the ram board I had designed and put on order. It was designed to have up to 4MB of SRAM using some 512kB SRAM chips I had gotten from a ham fest. It was layed out the way it was to get most of the address/data lines off the one side of the 68K to greatly simplify the wiring.
After a bit more wiring I was ready to power up the board and throw some code onto the EEPROMs and see if I could get anything to display on the beautiful DLR-2416 LED matrix displays.
And… Well its not quite what I expected… I wrote some code to display 0 and increment up in ASCII so 0-9 plus other characters at the end. We could see signs of this but its not quite right. This lead to a few days of head scratching and debugging. Luckily the RAM board provided a nice and easy interface for my logic analyzer to basically every signal I’d need to poke at for debugging.
While scratching my head on this issue and reviewing the schematics I got the ram boards I designed and ordered in the mail!
It came out great! It does cover a bit of the logic but I made sure not to cover my precious MOSTEK 68K with it!
And after a few more days I figured out all of the logic and decoding problems, I had to squeeze in a few more 7400 series chips but I got the displays working!
And I also show here that a USB battery bank gives enough juice to power the 68K and logic, mind you this is running at 6Mhz too! That 68K gets a bit toasty!
Next I made another ram board with just the top 512MB populated but with the pin header soldered on “upside down” to allow for easy ROM access for itterating through code. This is while I don’t yet have a prom monitor implemented so I can do code tests of things like testing ram, which is what I did next!
And the ram board checked out OK! Was able to do reads and writes through the entire address space I’d expect to see ram, this takes quite awhile to run! But it works great!
So next I wanted to get this thing being a namebadge! Displaying my name and a short message to scroll through. To do the scrolling though this was a great time to test out the 555 that was placed on here as an interrupt timer. This will be used as a scheduler timer by *nix! After a bit of assembly and head scratching debugging and figuring out I had a dead 555, I was able to get everything working!
This is about where this project got to in the few weeks I spent hacking on it at the time. There is still a lot to do, implement a ROM monitor, verify the UART logic works, verify IDE logic, then start porting uCLinux or similar to it! This will likely come at a later date as other interests and projects come across the bench.